motion sensing products reliability data description the following cumulative test results have been obtained from testing performed at agilent technologies in accordance with the agilent general semiconductor specification. hctl-1100 (40-pin pdip) hctl-1100 #plc (44-pin plcc) table 1. long-term life performance [1] ambient total failure rate [7] point failures/ temp. device mttf test test conditions units [2] ( c) [3] hours [4,5,6] fits [8] %/yr (hours) [7] high t a = 150 c 30 13,470,000 74 0.07 13,470,000 temperature 1,000 hours operating dynamic state 0/514 55 5,602,000 179 0.16 5,602,000 life v dd = 5.5 v 85 2,298,000 435 0.38 2,298,000 40 pin pdip t a = 85 c 30 42,000,000 24 0.02 42,000,000 rh = 85% 1,000 hours 0/420 55 4,200,000 238 0.21 4,200,000 biased static temperature state 85 420,000 2381 2.10 420,000 humidity v dd = 5.5 v static operating 44 pin plcc life t a = 85 c 30 49,200,000 20 0.02 49,200,000 rh = 85% 1,000 hours 0/492 55 4,920,000 203 0.18 4,920,000 biased static state 85 492,000 2033 1.80 492,000 v dd =5.5 v
table 2. mechanical and environmental tests [9] units units test test conditions tested failed 121 c pressure pot 2 atmospheres 50 0 95 - 100% rh 240 hours -55 c to 125 c thermal shock liquid-to-liquid 45 0 no bias 200 cycles dwell = 5 min., transfer < 10 sec. 1.5 k w , 100 pf 2000 volts 2 [10] 0 esd 5 pulses/pin v dd = gnd gnd = gnd all other pins floating latch-up all pins tested for source/sink to 500 ma, 2 [10] 0 v dd = 5.5 volts solder process typical solder process with peak temperature of 260 c, 32 0 resistance 10 sec. duration notes: 1. these results are based on long-term life monitoring of the basic cmos process and pdip and plcc packaging processes in whi ch these products are produced. the relevance of these data derives from the design-independent nature of many failure modes in a cmos process and packaging system. design-specific failure modes are addressed by the tests in table 2. 2. a failure is any part which does not meet data sheet specifications. data covers the period from february, 1989 to februar y, 1990. 3. ambient temperature is shown here for convenience. the failure rate depends on the device junction temperature under operat ing conditions. the junction temperature rise for this device is less than 5 c under the test conditions used here. 4. the total device hours is the equivalent device hours for 100% on-time at the stated ambient temperature. 5. for high temperature operating life, the estimated life at various temperatures is calculated using an arrhenius model with an activation energy of 0.3 ev to derate the data from actual test conditions to lower temperatures. 6. for temperature, humidity static operating life, extrapolation to lower temperatures assumes an arrhenius model for electro lytic corrosion with an activation energy of 0.79 ev based on: d.s. peck, comprehensive model for humidity testing correlation, pro c. rel. phys. symp., 24, (1986). 7. mttf is defined as mean time to failure. the point mttf is the total device hours divided by the number of failures. the failure rate is defined as the reciprocal of the mttf. where no failures occurred during testing, the point mttf and failure rate have been calculated assuming one failure. 8. fit is defined as failures in time. fits = failures/10 9 device-hours. 1142 fits = 1% / yr. = 10,000 ppm / yr at 100% on-time. 9. these tests were performed with this ic in both the pdip and plcc packages. 10. these tests check for circuit design errors. a small sample size is used since the failure rate is expected to be 100% in d evices with design-related failure modes. www.semiconductor.agilent.com data subject to change. copyright ? 1999 agilent technologies, inc. 5952-2700 (11/99)
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